Brian D. Kaul

Brian D. Kaul

Patent & Trademark Attorney, Shareholder

Brian D. Kaul is a registered patent attorney with experience preparing and prosecuting patents in a wide variety of technical areas including electrical, mechanical and software fields. Brian received his Juris Doctorate (cum laude) from William Mitchell College of Law and holds Bachelor of Science degrees in Electrical Engineering (with distinction) and Aerospace Engineering from the University of Minnesota. He is a member of Eta Kappa Nu Electrical Engineering Honor Society. Brian is a member of the Minnesota Bar and is admitted to practice before the U.S. District Court, District of Minnesota and the U.S. Court of Appeals for the Federal Circuit.

Areas of Practice

  • Patents
  • Trademarks
  • Copyright
  • Licensing
  • Portfolio Analysis
  • Freedom to operate
  • Validity/non-infringement opinions
  • Patent portfolio management and strategy
  • Post-grant proceedings

Areas of Technical Expertise

  • Electronics
  • Medical Systems and Devices
  • Mechanical Devices
  • Fluid Mechanics
  • Process Devices
  • Software
  • Aerospace
  • Autonomous Vehicles
  • Electromechanical Devices
  • Printing Systems and Devices
  • Data Encoding
  • Laminating Devices
  • Data Storage Devices
  • Surgical Laser Systems
  • Laser Resonators
  • Chemical Delivery Systems

Education

  • William Mitchell College of Law, JD (1996)
  • University of Minnesota, B.S. Electrical Engineering (1999)
  • University of Minnesota, B.S. Aerospace Engineering and Mechanics (1991)

Exemplary Patents

  • U.S. 8,236,147 Tubular Electrolysis Cell and Corresponding Method
  • U.S. 8,016,996 Method of Producing a Sparged Cleaning Liquid Onboard a Mobile Surface Cleaner
  • U.S. 7,931,811 Dielectric Barrier Reactor Having Concentrated Electric Field
  • U.S. 7,549,212 Method of Adjusting Recession of an Element of a Slider
  • U.S. 7,539,890 Hybrid Security Clock
  • U.S. 7,502,982 Iterative Detector with ECC in Channel Domain
  • U.S. 7,424,687 Method and Apparatus for Mapping Design Memories to Integrated Circuit Layout
  • U.S. 7,305,129 Methods and Apparatus for Populating Electronic Forms From Scanned Documents
  • U.S. 7,231,019 Automatic Identification of Telephone Callers Based on Voice Characteristics
  • U.S. 7,002,493 Boolean Logic Tree Reduction Circuit
  • U.S. 6,816,562 Silicon Object Array With Unidirectional Segmented Bus Structure
  • U.S. 6,548,009 Method for Controlling Twist Curvature of a Disc Head Slider
  • U.S. 6,262,634 Phase-locked loop with Built-in Self-Test of Phase Margin and Loop Gain
  • U.S. 6,224,279 Keyboard Having Integrally Molded Keyswitch Base
  • U.S. 5,909,276 Method for Detecting Particles and Defects on Substrates in Integrated Process Tools
  • U.S. 5,872,494 Level Gage Waveguide Process Seal Having Wavelength-Based Dimensions
  • U.S. 5,727,110 Electro-Optic Interface for Field Instrument
  • U.S. 5,633,899 Phase Locked Loop for High Speed Data Capture of a Serial Data Stream
  • U.S. 5,619,420 Semiconductor Cell Having a Variable Transistor Width
  • U.S. 2013/0240774 Neutron Detection Chip Assembly
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